Control Unit Implementation : Hardwired Implementation

In a hardwired implementation, the control unit is mainly a combinational circuit. Its input logic signals are moved into a collection of output logic signals, which are the control signals. This method is examined as follows :

Control Unit Inputs :

The main inputs are the instruction register, the clock, flags, and control bus signals. In the flags and control bus signals, each individual bit possess some meaning. The other two inputs are not useful to the control unit directly. First take into account the instruction register. The control unit makes use of the opcode and will does different actions for different instructions. To solve the control unit logic, there should be unique logic input for each opcode. This function can be done by a decoder, which takes an encoded input and generate a single output. Normally a decoder will have n binary inputs and 2n binary outputs. Each of the 2n different input model will enable a single unique output. The decoder for a control unit will normally have to be more complex than that, to consider for variable-length opcodes.

The clock portion of the control unit supplies a repetitive sequence of pulses. This is important for measuring the duration of micro-operations. Normally, the period of the clock pulses must be long enough to permit the propagation of signals along data paths and through processor circuitry. As we know that, the control unit generates different control signals at different time units within a single instruction cycle. So, we would like a counter as input to the control unit with a different control signal being used for T1, T2 and so on. On the completion of an instruction cycle, the control unit must supplied back to the counter to reinitialize it at T1.

Control unit Logic :

In order to define the hardwired implementation of a control unit, we have to learned about the internal logic of the control unit that generate output control signals as a function of its input signals. Normally, what must be done is, for each control signal, to obtain a Boolean expression of this signal as a function of the inputs. This same process could be repeated for every control signal produced by the processor. The output would be a set of Boolean equations that explain the behaveiour of the control unit and hence of the processor.

To combine everything together, the control unit must control the state of the instruction cycle. At the end of each sub-cycle (fetch, indirect,execute, interrupt) the control unit supplies a signal that result in the timing generator to initialize again and supply T1. The control unit must also set the desired values to define the next sub-cycle to be performed.

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